Computer Architecture (2012/2013)
Bachelor Informatica 2de jaar, Universiteit Leiden
Course objectives & learning topics
Develop qualitative and quantitative insight into the trade-offs of the major technological developments in computer architecture in the last twenty years.
Topics:
- Instruction set architectures
- Processors: pipelines, hazards, multiple issue and out-of-order execution
- Memory: SRAM/DRAM tradeoffs, access times, hierarchy
- Caches: associativity, indexing
- Multi-cores & hardware multithreading
- Vector processors & VLIW
Schedule
Location: Universiteit Leiden, Snellius
Lectures: Tuesday 11:00-13:00; room 174
Labs: Tuesday
09:00-11:00.
Lecture/labs every Tuesday from Sept 3rd to Dec
3rd.
Exam on Jan 15th, 2013.
Contact & staff
Lecturer: Raphael 'kena' Poss; Student assistents: Jonathan Neuteboom & Bart Hijmans.
Assistance will be available on Monday and Thursday from 15.30-16.15h and on Tuesday from 09.00-11.00h.
Assistance and course communication will take place on the mailing list ca2012@list.uva.nl. Please register to this list ASAP using this link.
Evaluation
Weekly homework assignments: 20%
Lab assignments: 50%
Final exam: 30%
Course documents
(This section will be populated as the course moves forward)
General support documentation:
- MIPSpro assembly programmer's guide
- Henessy & Patterson, Appendix A
- Alpha Architecture Reference Manual, Fourth edition
Course materials:
- Week 1 (Introduction):
Lecture slides + Homework - Week 2 (Performance, Processor intro):
Lecture slides + Simple processor diagram + Homework - Week 3 (Processor construction, Pipeline intro):
Processor diagram + Homework - Weeks 1-3: Lab assignment 1 (intro assembly) + materials + Documentation to install the tools on your own computer. NB: the Leiden IT should have installed these tools on a shared directory on the University's system; this document is to be used only if you wish to use the tools on your own computer.
- Week 4: Lab assignment 2a (intro mgsim framework) + materials
- Week 4 (Memory technology):
Lecture slides + Homework - Week 5 (Memory hierarchy, caches):
Lecture slides + Memory interface + DM cache diagram + Homework (BONUS) - Week 6 (Direct-mapped caches):
Lecture slides (cont. week 5) + Diagram cache structure + Diagram cache scenarios + Homework - Week 7 (Set-associative caches, virtual memory):
Lecture slides (cont. week 5) + Lecture slides (week 7) + Homework + BONUS homework - Weeks 4-7: Lab assignment 2b (MIPS ISA simulation, partial) + materials
- Weeks 4-8: Lab assignment 2c (MIPS ISA simulation, full) + materials
- Week 8 (Caches & virtual memory, I/O):
Lecture slides + Homework (weeks 8-9) - Week 9 (Review pipeline; critical path; branch prediction):
Lecture slides + Homework (weeks 8-9) + BONUS homework - Week 10 (Delay slots, predication, intro hardware multithreading):
Lecture slides (cont. week 9) - Week 11 (Hazards, intro out-of-order execution):
Lecture slides + Homework + BONUS homework - Weeks 11-12: Lab assignment 3a (memory statistics)
- Week 12 (Data hazards, out-of-order execution):
Lecture slides (cont. week 11) + Homework - Week 13 (Explicit parallelism):
Homework - Weeks 13-14: Lab assignment 3b (memory statistics, cont.) + materials
